After a discussion of the limitations of current technology and why it cannot be scaled-up I propose an alternative technology for an extreme scale general purpose processor with a target of 60 double precision TFLOPS. Introduction ############ ############ Performance \(P\) is the product of the performance of each core and the number of cores \(N\) effectively used by the software \[ P = N P_\mathrm{core} \] The performance of each core is given by the product of the performance-per-cycle PPC --named IPC very often-- and the working frequency F \[ P_\mathrm{core} = PPC * F \] An actual x86 datacenter CPU provides a peak performance of 691.2 double precision GFLOPS of performance at TDP of 200W; our goal is to increase that performance by two orders of magnitude. A priori, we can increase any of the above factors \(N\), \(PPC\), \(F\) to increase the total performance, but there are limits. Classic scaling laws for silicon ceased to work about a decade ago; further node shrin